Update I801 sniffer to support multiple read/write sizes

OpenAuraSDK/AuraController.cpp

@@ -52,13 +52,6 @@ AuraController::AuraController(i2c_smbus_interface* bus, aura_dev_id dev)
         effect_reg = AURA_REG_COLORS_EFFECT_V2;
         led_count = 5;
     }
-    // AUMA0-E6K5-0104 - Second generation motherboard controller
-    else if (strcmp(device_name, "AUMA0-E6K5-0104") == 0)
-    {
-        direct_reg = AURA_REG_COLORS_DIRECT_V2;
-        effect_reg = AURA_REG_COLORS_EFFECT_V2;
-        led_count = 5;
-    }
     // Assume first generation controller if string does not match
     else
     {

OpenAuraSDK/OpenAuraSDK.cpp

@@ -49,7 +49,6 @@ std::vector<i2c_smbus_interface *> busses;
 #define SIO_NCT6102_ID      0x1060  /* Device ID for NCT6102D/6106D (1061)  */
 #define SIO_NCT6793_ID      0xd120  /* Device ID for NCT6793D (D121)        */
 #define SIO_NCT6796_ID      0xd420  /* Device ID for NCT6796D (D421)        */
-#define SIO_NCT6798_ID      0xd428  /* Device ID for NCT6798D (D428)        */
 #define SIO_REG_LOGDEV      0x07    /* Logical Device Register              */
 #define SIO_REG_DEVID       0x20    /* Device ID Register                   */
 #define SIO_REG_SMBA        0x62    /* SMBus Base Address Register          */
@@ -125,7 +124,6 @@ void DetectNuvotonI2CBusses()
     case SIO_NCT6102_ID:
     case SIO_NCT6793_ID:
     case SIO_NCT6796_ID:
-    case SIO_NCT6798_ID:
         bus = new i2c_smbus_nuvoton_nct6793d();
 
         // Set logical device register to get SMBus base address
@@ -150,9 +148,6 @@ void DetectNuvotonI2CBusses()
         case SIO_NCT6796_ID:
             sprintf(bus->device_name, "Nuvoton NCT6796D SMBus at %X", smba);
             break;
-        case SIO_NCT6798_ID:
-            sprintf(bus->device_name, "Nuvoton NCT6798D SMBus at %X", smba);
-            break;
         }
 
         busses.push_back(bus);
@@ -265,8 +260,8 @@ void DetectI2CBusses()
     struct dirent *         ent;
     int                     test_fd;
 
-    // Start looking for I2C adapters in /sys/bus/i2c/devices/
-    strcpy(driver_path, "/sys/bus/i2c/devices/");
+    // Start looking for I2C adapters in /sys/class/i2c-adapter/
+    strcpy(driver_path, "/sys/class/i2c-adapter/");
     dir = opendir(driver_path);
 
     if(dir == NULL)
@@ -560,16 +555,139 @@ void DumpAuraRegisters(AuraController * controller)
 *       Main function.  Detects busses and Aura controllers, then opens the main window    *
 *                                                                                          *
 \******************************************************************************************/
+/* I801 SMBus address offsets */
+#define SMBHSTSTS       (0 + i801_smba)
+#define SMBHSTCNT       (2 + i801_smba)
+#define SMBHSTCMD       (3 + i801_smba)
+#define SMBHSTADD       (4 + i801_smba)
+#define SMBHSTDAT0      (5 + i801_smba)
+#define SMBHSTDAT1      (6 + i801_smba)
+#define SMBBLKDAT       (7 + i801_smba)
+#define SMBPEC          (8 + i801_smba)     /* ICH3 and later */
+#define SMBAUXSTS       (12 + i801_smba)    /* ICH4 and later */
+#define SMBAUXCTL       (13 + i801_smba)    /* ICH4 and later */
+#define SMBSLVSTS       (16 + i801_smba)    /* ICH3 and later */
+#define SMBSLVCMD       (17 + i801_smba)    /* ICH3 and later */
+#define SMBNTFDADD      (20 + i801_smba)    /* ICH3 and later */
 
 int main(int argc, char *argv[])
 {
     DetectI2CBusses();
 
-    DetectAuraControllers();
+    int i801_smba = ((i2c_smbus_i801*)busses[0])->i801_smba;
+
+    while(1)
+    {
+        while ((Inp32(SMBHSTSTS) & 0x02) != 0)
+        {
+            for (int i = 0; i < 5000; i++);
+        }
+
+        while ((Inp32(SMBHSTSTS) & 0x02) == 0)
+        {
+            for (int i = 0; i < 5000; i++);
+        }
+        {
+            unsigned char addr = Inp32(SMBHSTADD);
+            unsigned char size = Inp32(SMBHSTCNT);
+            unsigned char cmnd = Inp32(SMBHSTCMD);
+            unsigned char dat0 = Inp32(SMBHSTDAT0);
+            unsigned char dat1 = Inp32(SMBHSTDAT1);
+
+            if (addr & 1)
+            {
+                switch (size & 0x1C)
+                {
+                case I801_QUICK:
+                    printf("Read %02x from address %02x \n",
+                        dat0,
+                        addr >> 1);
+                    break;
+
+                case I801_BYTE_DATA:
+                    printf("Read %02x from %02x, address %02x \n",
+                        dat0,
+                        cmnd,
+                        addr >> 1);
+                    break;
+
+                case I801_WORD_DATA:
+                    printf("Read %02x %02x from %02x, address %02x \n",
+                        dat0,
+                        dat1,
+                        cmnd,
+                        addr >> 1);
+                    break;
+
+                case I801_BLOCK_DATA:
+                    printf("Read block of length %02x from %02x, address %02x, contents: ",
+                        dat0,
+                        cmnd,
+                        addr >> 1);
+
+                    // Read SMBHSTCNT to reset SMBBLKDAT read pointer
+                    Inp32(SMBHSTCNT);
+
+                    for (int byte = 0; byte < dat0; byte++)
+                    {
+                        printf("%02x ", Inp32(SMBBLKDAT));
+                    }
+
+                    printf("\n");
+
+                    break;
+                }
+            }
+            else
+            {
+                switch (size & 0x1C)
+                {
+                case I801_QUICK:
+                    printf("Wrote %02x to address %02x \n",
+                        dat0,
+                        addr >> 1);
+                    break;
+
+                case I801_BYTE_DATA:
+                    printf("Wrote %02x to %02x, address %02x \n",
+                        dat0,
+                        cmnd,
+                        addr >> 1);
+                    break;
+
+                case I801_WORD_DATA:
+                    printf("Wrote %02x %02x to %02x, address %02x \n",
+                        dat0,
+                        dat1,
+                        cmnd,
+                        addr >> 1);
+                    break;
+
+                case I801_BLOCK_DATA:
+                    printf("Wrote block of length %02x to %02x, address %02x, contents: ",
+                        dat0,
+                        cmnd,
+                        addr >> 1);
+
+                    // Read SMBHSTCNT to reset SMBBLKDAT read pointer
+                    Inp32(SMBHSTCNT);
+
+                    for (int byte = 0; byte < dat0; byte++)
+                    {
+                        printf("%02x ", Inp32(SMBBLKDAT));
+                    }
+
+                    printf("\n");
+
+                    break;
+                }
+            }
+        }
+    }
 
 #if WIN32
-    OpenAuraSDKDialog dlg(busses, controllers);
-    dlg.DoModal();
+    //OpenAuraSDKDialog dlg(busses, controllers);
+    //dlg.DoModal();
 
     return 0;
 

README.md

@@ -1,56 +1,25 @@
-# OpenAuraSDK
-##### This project is an open-source implementation of the Asus Aura RGB controller software.  It currently only supports a limited number of motherboard and RAM module lighting controllers.
+OpenAuraSDK
 
-## Supported Devices 
+This project is an open-source implementation of the Asus Aura RGB controller software.  It currently only supports a limited number of motherboard and RAM module lighting controllers.
 
-Confirmed supported motherboards:
-  - ASUS PRIME X370 Pro
-  - ASUS PRIME X470 Pro
-  - ASUS PRIME Z270-A
-  - ASUS PRIME Z370-A
-  - ASUS ROG Strix Z370-E
-    
-Confirmed supported RGB RAM (except on X299):
-  - G.Skill Trident Z RGB
-  - Geil Super Luce
-  - TeamGroup Delta RGB
+It supports both Windows and Linux.  To build on Windows, download the latest Visual Studio Community edition and open the .sln.  You may have to retarget the project to the latest version of the Windows SDK and build tools and stuff.  Build for x86, the InpOut32 library I use does not support x64.
 
-Experimental support in generic RGB testing branch:
-  - Corsair Vengeance RGB
-  - Corsair Vengeance Pro RGB
-  - HyperX Predator RGB
+To build on Linux, you can either open the project using QT Creator or build it using qmake.
 
-## Installation
-#### Windows
-  1. Download the latest Visual Studio Community Edition and open the `.sln`.
-  2. Build the project for `x86` Architecture. The InpOut32 library I use does not support x64.
-  3. Copy InpOut32.dll from dependencies to the same path as OpenAuraSDK.exe.
+To build with qmake:
 
-**You may have to retarget the project to the latest version of the Windows SDK and build tools and stuff.**
+cd OpenAuraSDK
 
-**You must run the application as Administrator the first time to allow InpOut32 to set up.  It can be run as a normal user afterwards**
+qmake OpenAuraSDK.pro
 
-#### Linux:
-  1. Either open the project using QT Creator or build it using qmake.
-    
-         cd OpenAuraSDK
-         qmake OpenAuraSDK.pro
-         make
-     
+make
 
-  2. Allow access to SMBus:<br>
+You'll have to enable user access to your SMbus if you don't run as root, for instance:
 
-     - This can be identified by your motherboard
-         ##### Intel
-          - `modprobe i2c-dev i2c-i801`
-          - Asus used the SMBus controller on the Super IO chip for on-board Aura chips on Intel motherboards.  I have a kernel patch to add a driver for this chip [here](https://gitlab.com/CalcProgrammer1/OpenAuraSDK/issues/22).  After patching the kernel, enable the Nuvoton NCT67xx SMBus driver in your kernel configuration.  The driver may be loaded with `modprobe i2c-nct6775`
-         ##### AMD
-          - `modprobe i2c-dev i2c-piix4` 
-          - The second SMBus isn't currently picked up by the kernel driver and that seems to be where Asus wired the Aura controllers so I have a kernel patch [here](https://gitlab.com/CalcProgrammer1/OpenAuraSDK/issues/9) that will allow the kernel to use the second bus (at `0x0b20`).
+sudo chmod 777 /dev/i2c-0
 
-     - You'll have to enable user access to your SMbus if you don't run as root.
-       - List all SMBus controllers: `sudo i2cdetect -l`
-       - Find out which control your Aura devices (PIIX4, I801, and NCT67xx)
-       - Give user access to those controllers, for instance: `sudo chmod 777 /dev/i2c-0`
+You can figure out which SMBus is your motherboard's by using i2cdetect -l. For AMD boards, the second SMBus isn't currently picked up by the kernel driver and that seems to be where Asus wired the Aura controllers so I have a kernel patch here:
 
+https://gitlab.com/CalcProgrammer1/OpenAuraSDK/issues/9
 
+that will allow the kernel to use the second bus (at 0x0b20). Additionally, the AMD SMBus driver adds duplicate entries for the first bus (at 0x0b00) so I've just been giving access to only one of them, otherwise devices will show up multiple times in the list.